Theory
The thin copper roads
Back at the shop, Chirag tilts a motherboard against the light. Hundreds of hair-thin copper lines fan out between the CPU socket and the RAM slots.
"RAM is here," he says, "the processor is there, two centimetres apart. Question for you: when the CPU wants one number stored in RAM, how does the request physically travel?"
Along those copper lines. They are called buses, and there are four kinds, each with one job.
Theory
A courier delivery
Every courier delivery needs four things: the address slip (where to go), the parcel itself (what is being moved), the instructions (ring the bell, take a signature, return receipt), and fuel for the van. Swap in: address bus, data bus, control bus, power bus. One delivery, four separate roles that must never get mixed up.
At a glance
The four buses at a glance
| Bus | Carries | Direction |
|---|---|---|
| Address bus | The location to read/write | One-way: CPU → memory |
| Data bus | The actual data | Two-way: CPU ↔ memory |
| Control bus | Commands and timing (read, write) | Signals both ways |
| Power bus | Electricity to components | From power supply outward |
Theory
Why width matters
A bus is a bundle of parallel lines, and the number of lines is its width.
- A data bus 32 lines wide moves 32 bits in one go; 64 lines move double per trip.
- An address bus n lines wide can point at 2ⁿ different locations. With 32 lines: 2³² addresses, about 4 GB worth.
That last fact is why old 32-bit computers could not use more than 4 GB of RAM, a real answer to a real customer question at the shop.
Quiz
Which bus is unidirectional (one-way)?
- Address bus
- Data bus
- Control bus
- All buses are two-way
Show the answer
Address bus
Only the CPU announces addresses; memory never sends an address back, so the address bus runs one way, CPU → memory. The data bus must be two-way (reading brings data in, writing sends it out). This one-way/two-way pairing is the single most repeated bus question in exams.
Think first
Think it through
Why must the data bus be two-way? Picture the two operations the CPU performs on memory.
Show the answer
Read and write. Reading pulls data from memory into the CPU; writing pushes results from the CPU into memory. Same wires, both directions. The control bus is what announces which of the two is happening, via its read/write signal, so memory knows whether to speak or listen.
Watch out
Where marks leak
Swapping the directions: writing "address bus is bidirectional" is the classic slip. Anchor it: addresses are only ever announced by the CPU, so one-way; data flows both ways, so two-way. Second leak: calling the width "speed". Width is how many bits travel per trip, not how fast the trips happen.
Theory
You already use this word
USB literally stands for Universal Serial Bus, the same idea standardised for external devices. And that 2ⁿ addressing rule is your first real payoff from binary (coming two topics ahead in Number Systems): the entire reason 32-bit vs 64-bit matters when Chirag sells a machine is powers of two on the address bus.
Summary
Key takeaways
- Buses are shared wire highways connecting CPU, memory and devices.
- Address bus: where (one-way, CPU → memory).
- Data bus: what (two-way, read and write).
- Control bus: when and how (read/write and timing signals).
- Power bus: electricity distribution.
- n address lines reach 2ⁿ locations; width = bits per trip.
- Memory hook: address slip, parcel, instructions, fuel.